Qwen 4 code trail points to Huawei Ascend support
A September 30 SGLang draft targets Huawei Ascend attention support around the Qwen 4 architecture preview. Complete model serving still needs validation.
Code signal. A public engineering proposal remains under review. Checked October 1, 2026.
A new SGLang proposal adds to the public engineering trail around Qwen 4, targeting an optional attention path for Huawei Ascend 910C accelerators. Pull request 41855 appeared on September 30, 2026 and was still marked as a draft when checked on October 1.
Why Qwen 4 appears in this code
The naming can easily cause confusion. Alibaba’s official Qwen3.8 Flash Next model card describes that released checkpoint as an experimental preview of the architecture intended to underpin Qwen 4. The architecture name used in serving code therefore does not establish a separate, newly released Qwen 4 model.
The card describes a 125 billion parameter language model with 6 billion parameters activated, plus 51 billion parameters of additional embedding capacity and a 4 billion parameter prediction component. These are published properties of the preview. They should not be copied into a specification sheet for an unannounced final Qwen 4 configuration.
Alibaba’s August 27 architecture explanation says it released the weights early so the community could inspect the design before the full model family was built on it. That gives the present integration work a clear context. Developers are adapting inference engines to a public architecture rather than revealing a complete product roadmap.
The proposal targets the first stage of a response
Prefill is the stage in which an inference system processes an incoming prompt before generating its response. Improving that path can matter for the delay a user experiences before the first output arrives, particularly when the input is long. It is different from speeding up every subsequent generated token.
The CANN adapter is disabled by default. Its author reports nine operator tests on real hardware. Complete model serving, distributed operation and generated answer quality remain outside that validation.
Older prototype speed figures also appear in the draft. The author warns that they do not benchmark the submitted branch.
The broader integration is still being assembled
A separate SGLang integration proposal handles wider support for Qwen3.8 Flash Next on Ascend, including graph replay and speculative decoding. That work depends on companion kernel changes being packaged before it can merge. The distinction matters because a small operator can pass tests while the surrounding server still needs integration and validation.
There is parallel work on memory requirements. A September 18 host staging proposal addresses a 47.7 GiB embedding table by moving selected rows through host memory. That proposal was also shown as open in our check. Together, the two threads expose different practical constraints around the preview, including accelerator support and memory placement.
What would make the signal stronger
For an engineering team evaluating the architecture, the next useful milestones are merged code, packaged dependencies and reproducible tests of a complete serving configuration. Model quality, prompt processing speed, output speed and hardware memory use need separate measurements. A gain in one component does not settle the whole deployment decision.
For readers waiting for Qwen 4, the useful takeaway is where developers are investing effort. Hardware integration is one part of readiness. Final model specifications and commercial access require separate announcements from Alibaba.
Related coverage. Read ByteForward’s report on DeepSeek’s separate Ascend tooling release for the confirmed infrastructure announcement.
Image credit. Qwen logo from LobeHub Icons, used under the MIT license. Company marks remain trademarks of their owners.
